In some cases, “prtconf -vp” can help determine the cause of an unexpected crash/reboot just by knowing what the “reset-reason:” is.
# /usr/sbin/prtconf -pv
System Configuration: Sun Microsystems sun4u
Memory size: 4352 Megabyte
System Peripherals (PROM Nodes):
Node 0xf0029c1c
clock-frequency: 05f5e10
previous-reset-reason: ‘POR’
banner-name: ‘8-slot Sun Enterprise E4500/E5500’
idprom: 01800800.20a0f6d3.00000000.a0f6d3a9.00000000.00000000.00000000.00000000
reset-reason: ‘S-POR’
fatal-reset-info: 00006000
breakpoint-trap: 0000007f
#size-cells: 00000002
name: ‘SUNW,Ultra-Enterprise’
…
We see that the “reset-reason” is a ‘S-POR’. Use the following UltraSPARC(R) II chart to see what might have caused this reset.
|
reset-reason
|
Description
|
Could be caused by
|
|
POR
|
Power On Reset
|
HW Fatal Reset
|
|
S-POR
|
Soft Power On Reset
|
Panic, Regular reboot
|
|
B-POR
|
Button Power On Reset
|
Power-cycle, Power loss
|
|
S-XIR
|
Soft eXternaly Initiated Reset
|
Watchdog Reset
|
|
B-XIR
|
Button eXternaly Initiated Reset
|
XIR Button pressed
|
For the UltraSPARC(R) III systems only the V880 and V480 with OBP 4.10.7+ records the reset-reason. These are the possible codes:
POR Non-specific Trap Type 1
HPOR Sys Power On Normal Power On Reset
APOR Alarm Power On Alarm Power On Reset
(03) Undefined Undefined, should not happen
BPOR Button Reset Hardware “Button” reset
RPOR R/SC Reset RSC/RMC/SC/etc. reset
JPOR JTAG Reset JTAG/Scan-induced reset
WPOR Sys Watchdog System-wide external Watchdog
WDOG CPU Watchdog CPU-specific watchdog reset
XIR External/NMI System/CPU XIR
SIR CPU Instr CPU-specific SIR
ED CPU RED-State CPU-specific RED-State Expection
FATAL Sys Hardware System-wide hardware error/reset
ROMT ROM-Trap ROM Trap — should not happen
SPOR Software/User General command reset
Note: The system should not have been power cycled or rebooted manually otherwise the “reset-reason” won’t correspond to the reason of the unexpected reboot.
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